Digital access arrangement circuitry and method for connecting to phone lines having a DC holding circuit with switchable time constants

ABSTRACT

A digital direct access arrangement (DAA) circuitry may be used to terminate the telephone connections at the user&#39;s end that provides a communication path for signals to and from the phone lines. Briefly described, the DAA provides a programmable means for the DC termination for a variety of international phone standards. The invention may also be utilized with means for transmitting and receiving a signal across a capacitive isolation barrier. More particularly, a DC holding circuit is provided in which a programmable DC current limiting mode is available. In the current limiting mode, power may be dissipated in devices external to a DAA integrated circuit. Moreover, much of the power may be dissipated in external passive devices, such as resistors.

[0001] This application is a continuation-in-part application of U.S.Ser. Nos. 08/841,409, 08/837,702 and 08/837,714 all filed on Apr. 22,1997 and the following U.S. patent applications filed on Mar. 4, 1998:Ser. No. ______, entitled “Digital Isolation System With DataScrambling” by George Tyson Tuttle et al; Ser. No. ______, entitled“Digital Isolation With ADC Offset Calibration; by Andrew W. Krone etal.; Ser. No. ______, entitled “Ring-Detect Interface Circuitry andMethod for a Communication System” by Timothy J. Dupuis et al.; Ser. No.______, entitled “Call Progress Monitor Circuitry and Method for aCommunication System” by Timothy J. Dupuis et al.; Ser. No. ______,entitled “External Resistor and Method to Minimize Power Dissipation inDC Holding Circuitry for a Communication System” by Jeffrey W. Scott etal.; Ser. No. ______, entitled “Caller ID Circuit Powered ThroughHookswitch Devices” by Jeffrey W. Scott et al.; and Ser. No. ______,entitled “Framed Delta Sigma Data With Unlikely Delta Sigma DataPatterns” by Andrew W. Krone et al.; and Ser. No. ______, entitled“Direct Digital Access Arrangement Circuitry and Method For ConnectingTo Phone Lines” by Jeffrey W. Scott, Navdeep S. Sooch and David R.Welland, all of which are expressly incorporated herein by reference.

TECHNICAL FIELD OF THE INVENTION

[0002] This invention relates to the field of digital access arrangementcircuitry. More particularly, this invention relates to digital accessarrangement circuitry for connecting to a variety of phone linestandards. The digital access arrangement circuitry may further includeisolation barrier utilizing a capacitor coupled isolation barrier.

BACKGROUND

[0003] Direct Access Arrangement (DAA) circuitry may be used toterminate the telephone connections at a phone line user's end toprovide a communication path for signals to and from the phone lines.DAA circuitry includes the necessary circuitry to terminate thetelephone connections at the user's end and may include, for example, anisolation barrier, DC termination circuitry, AC termination circuitry,ring detection circuitry, and processing circuitry that provides acommunication path for signals to and from the phone lines.

[0004] Generally, governmental regulations specify the telephoneinterface requirements and specifications for a variety of parametersincluding AC termination, DC termination, ringer impedance, ringerthreshold, etc. For example, Federal Communications Commission (FCC)Part 68 governs the interface requirements for telephones in the UnitedStates. However, the interface requirements world wide are notstandardized, and thus, in countries other than the United States theapplicable standards may include the TBR21, NET4, JATE, and variouscountry specific PTT specifications. Because the interface requirementsare not standardized from country to country, often different DAAcircuitry is required for use in each country in order to comply withthe appropriate standard. The requirement for different DAA circuitry,however, limits the use of one phone line interface in a variety ofcountries. Thus, for example, a modem in a laptop computer configuredfor interfacing with a phone line in one country may not necessarilyoperate properly in another country. Further, the requirement fordifferent DAA circuitry in various countries hinders the design of asingle integrated cost effective DAA solution for use world wide.

[0005] As mentioned above, the telephone interface requirementsgenerally include specifications for DC termination of the telephoneline. For example, the DC impedance that the DAA circuitry presents tothe telephone line (typically ≦300Ω) may be required by regulations tobe less than the AC impedance that the DAA circuitry presents to thetelephone line (typically ≈600Ω). Consequently, inductive behavior isrequired from the section of the DAA circuitry that sinks DC loopcurrent, which is typically called the DC termination or DC holdingcircuitry. This inductive behavior of the DC holding circuitry shouldprovide both high impedance and low distortion for voiceband signals.The DC termination specifications may also include limits for themaximum current and power dissipation. For example, the TBR-21specification requires the DC holding circuit to limit DC current toless than 60 mA with a maximum power dissipation of approximately 2watts.

[0006] Prior techniques for implementing DC holding circuitry haveincluded bipolar transistor (e.g., PNP transistor) implementations.These prior techniques, however, have suffered from variousdisadvantages. For example, although bipolar transistor implementationstypically present a desired high impedance (e.g., >>600Ω) to thetelephone network for voiceband signals, such implementations arelimited. In contrast, a CMOS design would be preferable because CMOStechnology allows a high level of integration, for example with otherphone line interface functions. CMOS implementations on CMOS integratedcircuits, however, may face considerable problems in dissipating thepower consumed by the DC holding circuitry. The design of a DC holdingcircuit for use with multiple standards may be further complicated inthat the various international specifications may conflict with regardsto off-hook settling times and pulse dialing templates (which mayrequire fast settling time constants) and high speed interface designs(such as for use in modems) which require very low frequency operation(i.e. approximately as low as 10 Hz). Furthermore, it is desirable toimplement such DC holding circuits in a manner that does not causeexcessive distortion at low and high frequencies.

[0007] It is also desirable that the DAA circuitry act as an isolationbarrier since an electrical isolation barrier must exist incommunication circuitry which connects directly to the standard two-wirepublic switched telephone network and that is powered through a standardresidential wall outlet. Specifically, in order to achieve regulatorycompliance with Federal Communications Commission Part 68, which governselectrical connections to the telephone network in order to preventnetwork harm, an isolation barrier capable of withstanding 1000 voltsrms at 60 Hz with no more than 10 milliamps current flow, must existbetween circuitry directly connected to the two wire telephone networkand circuitry directly connected to the residential wall outlet.

[0008] There exists a need for reliable, accurate and inexpensive DAAcircuitry for effecting the DC termination characteristics for multiplephone line standards and a DAA circuitry which also provides thenecessary electrical isolation barrier.

SUMMARY OF THE INVENTION

[0009] The above-referenced problems are addressed by the presentinvention, which provides a reliable, inexpensive, DAA circuit that maybe utilized with multiple telephone interface standards and which alsoprovides an isolation system that is substantially immune to noise thataffects the timing and/or amplitude of the signal that is transmittedacross the isolating element, thus permitting an input signal to beaccurately reproduced at the output of the isolation system.

[0010] The present invention provides digital direct access arrangement(DAA) circuitry that may be used to terminate the telephone connectionsat the user's end to provide a communication path for signals to andfrom the phone lines. Briefly described, the invention provides a meansfor providing DC termination for a variety of international phonestandards. The invention may also be utilized with means fortransmitting and receiving a signal across a capacitive isolationbarrier. More particularly, a DC holding circuit is provided in which aprogrammable DC current limiting mode is available. In the currentlimiting mode, power may be dissipated in devices external to a DAAintegrated circuit. Moreover, much of the power may be dissipated inexternal passive devices, such as resistors

[0011] In one embodiment, a communication system, comprising phone lineside circuitry that may be coupled to phone lines and powered sidecircuitry that may be coupled to the phone line side circuitry throughan isolation barrier is provided. The system may further include a DCholding circuit within the phone line side circuitry, the DC holdingcircuit being programmable in response to data transmitted across theisolation barrier to operate the DC holding circuit in a plurality ofmodes. The DC holding circuit may be operable in at least a first modeto meet a first phone line interface standard and a second mode to meeta second phone line interface standard, the second phone line interfacestandard having a DC current limit requirement.

[0012] In another embodiment, a method of providing a communicationsystem that may be coupled to a phone line is provided. The method mayinclude coupling an isolation barrier between powered circuitry andphone line side circuitry and forming a DC holding circuit within thephone line side circuitry, the DC holding circuit comprising a phoneline side integrated circuit and external circuitry external to theintegrated circuit. The method may further comprise providing aprogrammable circuit for switching the DC holding circuit between atleast a first and second mode of operation, the first mode of operationfor at least a first phone line interface standard and the second modeof operation for at least a second phone line interface standard, thesecond standard having a DC termination current limit. The method mayfurther include coupling the internal circuitry and external circuitryso that if the DC holding circuit is operated in the second mode ofoperation more power may be dissipated in the external circuitry duringthe second mode of operation than during the first mode of operation.

[0013] In yet another embodiment, a DC holding circuit for reducingpower dissipation requirements of an integrated circuit a communicationsystem that may be connected to phone lines is provided. The DC holdingcircuit may include at least one switchable circuit, the switchablecircuit having a first state for a non-current limiting mode ofoperation and a second state for a current limiting mode of operation;external circuitry external to the integrated circuit; and internalcircuitry within the integrated circuit, the external circuitry and theinternal circuitry being coupled together wherein the external circuitrydissipates more power in the current limiting mode than in thenon-current limiting mode.

[0014] In yet another embodiment, a method of providing a DC holdingcircuit is provided. The method may include forming the DC holdingcircuit with internal circuitry internal to an integrated circuit andexternal circuitry external to the integrated circuit. The method mayfurther include providing a programmable circuit for switching the DCholding circuit between at least a first and second mode of operation,the first mode of operation for at least a first phone line interfacestandard and the second mode of operation for at least a second phoneline interface standard, the second standard having a DC terminationcurrent limit. The method may further include coupling the internalcircuitry and external circuitry so that if the DC holding circuit isoperated in the second mode of operation more power may be dissipated inthe external circuitry during the first mode of operation than duringthe second mode of operation.

[0015] In another a method of forming a DC holding circuit is provided.The method may include providing integrated circuitry and non-integratedcircuitry to comprise the DC holding circuit, the DC holding circuitcapable of meeting at least at least a first and second phone lineinterface standards, the at least two phone line interface standardshaving differing current limit specifications, the second standardlimiting DC current to a lower amount than the first standard. Themethod may further comprise utilizing at least one switchable circuit sothat the DC holding circuit may be programmed for at least one of thephone line interface standards, and coupling the integrated circuitryand the non-integrated circuitry together so that when the DC holdingcircuit is programmed for the second phone line interface standard, atleast one circuit element of the external circuitry will receiveadditional DC current as compared to when the DC holding circuit isprogrammed for the first phone line interface standard.

[0016] In an alternative embodiment, there is provided a DC holdingcircuit compatible with a phone line standard having current limitrequirements for reducing power dissipation requirements of anintegrated circuit within a communication system that may be connectedto phone lines. The DC holding circuit may comprise external circuitryexternal to the integrated circuit and internal circuitry within theintegrated circuit, the external circuitry and the internal circuitrybeing coupled together wherein the external circuitry dissipates morepower in at least one mode of operation.

[0017] Another a method embodiment provides a DC holding circuit. Themethod includes forming the DC holding circuit with internal circuitryinternal to an integrated circuit and external circuitry external to theintegrated circuit, the DC holding circuit compatible with at least onephone line interface standard having a DC current limit requirement. Themethod may further include coupling the internal circuitry and externalcircuitry so that more power may be dissipated in the external circuitrythan in the internal circuitry.

[0018] A method of operating a DC holding circuit is provided. Themethod includes providing integrated circuitry and non-integratedcircuitry to comprise the DC holding circuit, coupling the integratedcircuitry and the non-integrated circuitry, and dissipating more powerin the external circuitry than in the internal circuitry if the DCholding circuit is utilized for a phone line interface standard having aDC current limit requirement.

DESCRIPTION OF THE DRAWINGS

[0019] So that the manner in which the herein described advantages andfeatures of the present invention, as well as others which will becomeapparent, are attained and can be understood in detail, more particulardescription of the invention summarized above may be had by reference tothe embodiments thereof which are illustrated in the appended drawings,which drawings form a part of this specification.

[0020] It is noted, however, that the appended drawings illustrate onlyexemplary embodiments of the invention and are therefore not to beconsidered limiting of its scope, for the invention may admit to otherequally effective embodiments.

[0021]FIG. 1 is a block diagram of a telephone set illustrating atypical application of the present invention.

[0022]FIG. 2 is a general block diagram of digital DAA circuitryincluding phone line side circuitry, an isolation barrier, and poweredside circuitry according to the present invention.

[0023]FIG. 3 is a general block diagram of transmit and receive signalpaths within digital DAA circuitry according to the present invention.

[0024]FIG. 4 is a general circuit diagram of digital DAA circuitryimplemented with two integrated circuits (ICs), a capacitive isolationbarrier, and external circuitry according to the present invention.

[0025]FIG. 5A-5D are DC termination characteristic curves of various DCtermination modes of the present invention.

[0026]FIG. 6 is a general block diagram of a technique for implementingcurrent limiting according to the present invention.

[0027]FIG. 7 is a circuit diagram of a DC holding circuit according tothe present invention.

[0028]FIG. 8 is graph of current characteristics of a distortionlimiting technique according to the present invention.

DESCRIPTION OF PREFERRED EMBODIMENTS

[0029] In order to provide a context for understanding this description,FIG. 1 illustrates a typical application for the present invention: atelephone that includes circuitry powered by a source external to thephone system. A basic telephone circuit 118 is powered by the “battery”voltage that is provided by the public telephone system and does nothave a separate power connection. Many modern phones 110, however,include radio (cordless), speakerphone, or answering machine featuresthat require an external source of power 112, typically obtained byplugging the phone (or a power supply transformer/rectifier) into atypical 110-volt residential wall outlet. In order to protect publicphone system 114 (and to comply with governmental regulations), it isnecessary to isolate “powered circuitry” 116 that is externally poweredfrom “isolated circuitry” 118 that is connected to the phone lines, toprevent dangerous or destructive voltage or current levels from enteringthe phone system. (Similar considerations exist in many otherapplications as well, including communication, medical andinstrumentation applications in which this invention may be beneficiallyapplied.) The required isolation is provided by isolation barrier 120.The signal that passes through the isolation barrier 120 is an analogvoice signal in a typical telephone application, but it may also be adigital signal or a multiplexed signal with both analog and digitalcomponents in various applications. In some applications, communicationacross isolation barrier 120 may be unidirectional (in eitherdirection), but in many applications, including telephony, bidirectionalcommunication is required. Bidirectional communication may be providedusing a pair of unidirectional isolator channels, or by forming a singleisolation channel and multiplexing bidirectional signals through thechannel. The primary requirements placed on isolation barrier 120 arethat it effectively prevents harmful levels of electrical power frompassing across it, while accurately passing the desired signal from thepowered side 122 to the isolated side 124, or in the reverse directionif desired.

[0030]FIG. 2 is a general block diagram of digital DAA circuitry 110including phone line side circuitry 118, an isolation barrier 120, andpowered side circuitry 116 according to the present invention. Theisolation barrier 120 may include one or more capacitors and allow forthe transmission of digital information between the isolation interface1614 in the phone line side circuitry and the isolation interface 1610in the powered side circuitry. The phone line side circuitry 118 may beconnected to phone lines of a telephone network system, and the poweredside circuitry 116 may be connected to external controllers, such asdigital signal processors (DSP), that may be part of a communicationdevice, such as a phone or modem.

[0031] The powered side circuitry 116, which may be implemented as anintegrated circuit (IC), may communicate with the external controllerthrough a digital interface 1606 and a control interface 1608. Forexample, the digital interface 1606 may have a number of external pinsproviding a serial port interface to the external controller, such as amaster clock input pin (MCLK), a serial port bit clock output (SCLK), aserial port data IN pin (SDI), a serial port data OUT pin (SDO), a framesync output pin (FSYNC_bar) (it is noted that the suffix “_bar” is usedto denote a signal that is typically asserted when at a low logiclevel), and a secondary transfer request input pin (FC). Similarly, thecontrol interface 1608 may have a number of external pins providingcontrol and status information to and from the external controller, suchas a ring detect status pin (RGDT_bar), an off-hook status pin(OFHK_bar), a reset pin (RESET_bar), and multiple mode select pins(MODE). In addition, the digital interface 1606 and the controlinterface 1608 are connected to the isolation interface 1610 so thatcontrol, status, signal and other desired information may be transmittedto and received from the phone line side circuitry 118 across theisolation banner 120.

[0032] The phone line side circuitry 118, which may be implemented as anintegrated circuit (IC), may communicate with the phone lines throughhybrid and DC termination circuitry 1617 (the DC termination circuitryprovides an internal power supply voltage), and determine ring-detectand off-hook status information through off-hook/ring-detect block 1620.In addition, the hybrid and DC termination circuitry 1617 and theoff-hook/ring-detect block 1620 are connected to the isolation interface1614 so that control, status, signal and other desired information maybe transmitted to and received from the powered side circuitry 116across the isolation barrier 120.

[0033] In the embodiment depicted, the hybrid portion of the hybrid andDC termination circuitry 1617 has an output pin QE2 (pin QE2 is alsoutilized for DC termination functions as described below) and an inputpin (RX) that may connect to external telephone interface circuitry suchas hook-switch circuitry and a diode bridge. The hybrid circuitry mayfunction to split the differential signal existing on the phone, whichtypically includes both transmit and receive analog information, into aninternal transmit signal (TX_(INT)) and receive signal (RX_(INT)). It isnoted that the QE2 output pin is used to transmit analog information tothe phone lines, and that the RX pin is labeled to indicate that it isused to receive analog information from the phone lines. These externalpin signals are different than the internal analog transmit signal(TX_(INT)) and analog receive signal (RX_(INT)).

[0034] The hybrid and DC termination circuitry 1617 may have a number ofexternal pins that also connect to external telephone interfacecircuitry such as hook-switch circuitry and a diode bridge. For example,the hybrid and DC termination circuitry 1617 may have a DC terminationpin (DCT), a voltage regulator pin (VREG), two external resistor pins(REXT and REXT2), two filter pins (FILT and FILT2) and a isolated groundpin (IGND). The DC termination circuitry terminates the DC voltage onthe phone line and provides an internal power supply for the phone lineside circuitry 118. The DC termination pin (DCT) receives a portion ofthe phone line DC current with the remainder flowing through pins QE2and QB2, depending upon the termination mode and DC current level. Thevoltage regulator pin (VREG) allows external regulator circuitry, suchas a capacitor, to be connected to the DC termination circuitry 1618.External resistors and a capacitor may be connected to the two externalresistor pins (REXT and REXT2) to set the real and complex ACtermination impedance respectively. The filter pin FILT (along with thecapacitor C5) sets the time constant for the DC termination circuit. Thefilter pin FILT2 sets the off hook/on hook transient responses for pulsedialing. The isolated ground pin (IGND) may be connected to the systemground for the powered side circuitry 116 through a capacitor within theisolation barrier 120 and may also be connected to the phone linethrough a ground connection within external diode bridge circuitry.

[0035] The off-hook/ring-detect block 1620 may have external input pinsallowing status information to be provided concerning phone line statusinformation (RNG1, RNG2), such as ring and caller identificationsignals. For example, the first ring detect pin (RNG1) may connect tothe tip (T) lead of the phone line through a capacitor and resistor, andthe second ring detect pin (RNG2) may connect to the ring (R) lead ofthe phone line through a capacitor and resistor. In addition,off-hook/ring-detect block 1620 may have external output pins (QB, QE)that control external off-hook circuitry to enter, for example, anoff-hook state or a limited power mode to get caller identificationinformation. More particularly, the output pins (QB, QE) may beconnected to the base and emitter, respectively, of a bipolar transistorwithin external hook-switch circuitry.

[0036]FIG. 3 is a general block diagram of internal transmit (TX) andreceive (RX) signal paths within digital DAA circuitry 110 according tothe present invention. In the embodiment depicted, information maycommunicated in either direction across the isolation barrier 120. It isnoted that FIG. 3 does not depict all of the functional blocks withinpowered side circuitry 116 and phone line side circuitry 118. It is alsonoted that the blocks depicted may be implemented as numerous additionalblocks carrying out similar functions.

[0037] In the embodiment of FIG. 3, communications from the phone lineside circuitry 118 to the powered circuitry 116 are considered receivesignals. Within phone line side circuitry 118, a delta-sigmaanalog-to-digital converter (ADC) 1710 receives an internal analogreceive signal (RX_(INT)), which may be provided for example by hybridcircuitry 1616. The output of delta-sigma ADC 1710 is oversampleddigital data stream in a pulse density modulation format. Thedecoder/encoder circuitry 1708 processes and formats this digitalinformation as desired before sending it across the isolation barrier120 as encoded digital information. For example, decoder/encoder 1708may multiplex control data with the digital stream before it is sentacross the isolation barrier 120. This control data may be a any desiredinformation, such as ring detect signals, off-hook detect signals, otherphone line status information or data indicative or the country in whichthe DAA will be utilized (so that the appropriate phone line interfacestandards will be satisfied). Within powered side circuitry 116, thedecoder/encoder 1706 decodes this encoded digital information receivedacross the isolation barrier 120. The digital filter 1702 processes thisdecoded digital stream and converts it into internal digital receivedata (RX_(D)) that may be provided through the digital interface 1606 toan external controller.

[0038] Communications from the powered side circuitry 116 to the phoneline side circuitry 118 are considered transmit signals. Within poweredside circuitry 116, a delta-sigma modulator 1704 receives an internaldigital transmit signal (TXD), which may be provided for example from anexternal controller through digital interface 1606. The output ofdelta-sigma modulator 1704 is an oversampled digital data stream in apulse density modulation format. The decoder/encoder circuitry 1706processes and formats this digital information as desired before sendingit across the isolation barrier 120 as encoded digital information. Forexample, decoder/encoder 1706 may multiplex control data with thedigital stream. This control data may be a any desired information, suchas ring detect signals, off-hook detect signals, or other phone linestatus information. In addition, decoder/encoder 1706 may add framinginformation for synchronization purposes to the digital stream before itis sent across the isolation barrier 120. Still further, decoder/encoder1706 may format the digital data stream so that a clock signal may berecovered within the phone line side circuitry 118, for example, as isdiscussed with respect to FIG. 14 above. Within phone line sidecircuitry 118, the decoder/encoder 1708 may recover a clock signal andmay decode the encoded digital information received across the isolationbarrier 120 to obtain framing, control or status information. Thedigital-to-analog converter (DAC) 1712 converts the decoded digitalstream and converts it into internal analog transmit data (TX_(INT))that may be provided as an analog signal through the hybrid circuitry1616 and ultimately to the phone lines.

[0039]FIG. 4 is a general circuit diagram of digital DAA circuitry 110implemented with a two integrated circuits (ICs) and a capacitiveisolation barrier 120 according to the present invention. In particular,powered side circuitry 116 may include a powered side integrated circuit(IC) 1802A, and phone line side circuitry 118 may include a phone lineside IC 1802B. External circuitry, such as hook-switch circuitry 1804and diode bridge circuitry 1806, is also shown connected to externalpins of the phone line side IC 1802B. In the embodiment depicted,external pins 1810 of the powered side IC 1802A are connected to anexternal digital signal processor (DSP) and the external pins 1808 areconnected to a external application specific IC (ASIC) or controller.The isolation barrier 120 may include a first capacitor (Cl) connectingan external signal (CIA) pin on the powered side IC 1802A to an externalsignal (CIB) pin on the phone line side IC 1802B. In addition, theisolation barrier 120 may have a second capacitor (C2) connecting theisolated ground (IGND) pin on the phone line side IC 1802B to the systemground (GND) pin on the powered side IC 1802A. In addition, the isolatedground (IGND) pin may be connected to node 1812 within diode circuitry1806 (and thereby be connected to the phone line) and the remainingground connections of the external circuitry of the phone line sidecircuitry 118. Typical component values for the various externalcapacitors, resistors, transistors, and diodes for the circuit of FIG. 4are shown in Table 1. TABLE 1 External Component Values Symbol Value C1150 pF, 4 kV, X7R, ±20% C2, C4 1000 pF, 4 kV, X7R, ±20% C3, C6, C10, C130.1 μF, 16 V, ±20% C5 0.1 μF, 50 V, X7R, ±20% C7, C8 680 pF, 300 V, X7R,±5% C9 22 nF, 300 V, X7R, ±20% C11 2200 pF, 50 V, X7R, ±5% C12 0.22 μF,16 V, ±20% C14 560 nF, 16 V, X7R, ±20% C15 0.47 μF, 300 V, ±20% R1, R4,R11, R17, R19, R20 4.87 KΩ, ¼ W ±1% R2 400 Ω, {fraction (1/10)} W ±5% R310 Ω, {fraction (1/10)} W, ±5% R4 2.2 kΩ, ½ W, ±5% R5, R6 30 kΩ,{fraction (1/10)} W ±5% R9, R10 30 kΩ, ¼ W ±5% R13 140 Ω, {fraction(1/10)} W ±5% R14 445 Ω, {fraction (1/10)} W ±5% R15 18.7 kΩ, ¼ W ±5%R16 10 kΩ, ¼ W ±5% R18 2.2 KΩ, {fraction (1/10)} W ±5% Q1 Zetex FMMT 497Q2 Motorola MMBTA92LT1 Q3 Motorola MMBTA42LT1 Q4 Motorola PZT2222AT1FB1, FB2 Ferrite Bead RV1 Sidactor 270 V D1-D4 1N4004 Z1, Z2 Zener Diode6 V

[0040] A variety of characteristics of the DAA may be programmable inorder to achieve compliance with a variety of regulatory standards.Thus, the DC termination characteristics, AC terminationcharacteristics, ringer impedance, or billing tone detector of the DAAcircuitry 110 may be programmable in order to achieve compliance with avariety of regulatory standards. For example, the DC current limitingrequirements of French and TBR21 standards may be programmable obtained.Further, the low voltage requirements of Japan, Italy, Norway, and othercountries may also be programmable obtained. More particularly, four DCtermination modes (modes 0, 1, 2, and 3) may be programmed by settingtwo bits of a programmable register through use of the serial port dataIN pin (SDI). More particularly, mode 2 is the standard loop voltagemode having no current limiting and with the transmit signal limited to−1 dBm. This mode is utilized to satisfy FCC and many European countryrequirements. FIG. 5C illustrates the I-V characteristics of mode 2. Asshown in FIGS. 5A-5D, the DC voltage across the TIP and Ring lines isplotted as a function of the DC loop current from the phone line. Withinthe operating range of 15 mA to 100 mA, the DC impedance of the DCholding circuit is approximately 50Ω (the slope of the I-V curve). Thelow voltage standards required for some countries (for example Norway)will be met by the low voltage mode 0 shown in FIG. 5A with the transmitsignal limited to −5.22 dBm. The slightly higher (approximately 0.3Vhigher) low voltage requirements of other countries (for example Japanand Italy) may be met by the low voltage mode 1 shown in FIG. 5B withthe transmit level limited to −2.71 dBm. As with mode 2, both lowvoltage modes 0 and 1 operate with a DC impedance of the DC holdingcircuit at approximately 50Ω. FIG. 5D illustrates the I-Vcharacteristics of mode 3 which is a current limiting mode as requiredin France and under the TBR21 standard. As shown in FIG. 5D, a firstsegment A of the I-V curve operates at a 50Ω impedance and a secondsegment B of the I-V curve operates at a 3200Ω impedance so that the DCtermination will current limit before reaching 60 mA (i.e. less than 60mA at approximately 35 volts or less. The crossover point between thetwo portions A and B of the curve is indicated as point C. A thirdsegment D of the I-V curve of FIG. 5D operates at an 800Ω impedance.

[0041] The data for the particular country the DAA will be utilizedwithin (and thus the required telephone line interface standards) may betransmitted across the capacitive barrier 120 with the various other DAAcontrol signals. The phone line side circuitry 118 can then beprogrammably configured to satisfy the different various internationalDC termination requirements. Thus, a digitally programmable system isprovided in which control bits can be provided across the isolationbarrier to program the phone line side circuitry 118 in a manner suchthat a wide variety of phone line interface standards can be satisfied.Moreover, the programmable nature of the phone line side circuitry 118may minimize the need for changing the external components utilized forcoupling the phone line side circuitry 118 to the phone line TIP andRING lines. In this manner a single DAA system may be utilized in a costeffective software programmable manner for world wide use.

[0042] In order to programmable achieve the DC terminationcharacteristics of FIGS. 5A-5C, the DC termination or DC holding circuitof the present invention provides a variety of improvements over theprior art. For example in order to achieve the current limitingrequirements (such as in the TBR21 standard), the phone line sidecircuitry 118 must dissipate up to approximately two watts of power.Typical non current limiting specifications such as FCC standards willresult in only a fraction of that amount of power dissipation to occur.However, it is undesirable to require this increase power dissipation tobe performed by the phone line side integrated circuit 1802B. Thecircuit of FIG. 6 provides a mechanism in which the increased powerdissipation requirements of current limiting standards may be achievedby dissipating the additional power external to the integrated circuit.In this manner, a single DAA system may be utilized for both currentlimiting DC termination standards and non-current limiting standardswithout requiring excessive power dissipation within an integratedcircuit.

[0043] As shown in FIG. 6, a phone line side integrated circuit 1802Bincludes DC termination or DC holding circuitry 600 which is coupled tothe DCT, QE2 and QB2 pins. The DCT pin is coupled to a resistor RA, forexample a 1600Ω resistor. The QB2 pin is coupled to a resistor RB, forexample a 1600Ω resistor. Though shown as single resistors, eachresistor RA and RB may be formed from a plurality of resistors such asresistors R1, R11, and R17, and R4, R19, and R19 respectively as shownin FIG. 4. Resistors RA and RB are coupled to the hookswitch circuitrysuch as shown in FIG. 4. The QE2 and QB2 pins are coupled to the emitterand base of transistor Q4 respectively. In operation, the DC current onfrom the phone line may be directed through resistors RA and RB invarying amounts through control of transistor Q4 in order to adjust theDC impedance seen by the phone lines. For example, the 50Ω impedancesection of the I-V curve of FIG. 5D (segment A) may be obtained when thetransistor Q4 is fully on and the bulk of the DC current passes throughtransistor Q4. The 3200Ω impedance section of the I-V curve of FIG. 5D(segment B) may be obtained while the transistor Q4 is being turned offand thus actively steering current through resistors RA and RB. The 800Ωimpedance section of the I-V curve of FIG. 5D (segment D) may beobtained when the transistor Q4 is fully turned off and thus the DCcurrent is split between the resistors RA and RB.

[0044] The DC termination mode may be selectably programmed through thepowered side circuitry 116 and control information transmitted acrossthe capacitive barrier 120 to the DC holding circuitry 600. Moreparticularly, the DC holding circuitry controls transistor Q4 dependingupon the selected mode. Thus when current limiting is desired,additional current may be steered to the resistors RA and RB. In thismanner the higher impedance needed for current limiting specificationssuch as the 3200Ω impedance section of the I-V curve of FIG. 5D may beaccurately achieved. Further, the additional power dissipation isperformed external to the phone line side integrated circuit 1802B byresistor RA, resistor RB, and transistor Q4. Thus in one exemplary,resistor RA and resistor RB may each dissipate up to approximatelythree-fourths of a Watt, transistor Q4 up to one-half Watt while theintegrated circuit need only dissipate up to three-tenths of a Watt.This technique is particularly advantageous in that much of the power isdissipated in passive elements (resistors) rather than solely in activedevices. Thus, more than 50% of the DC power dissipated by the DCholding circuit may be dissipated in devices external to the integratedcircuit 1802B, and more particularly, more than 50% of the DC power maybe dissipated in passive resistor devices.

[0045] A DC holding circuit 700 for implementing the DC terminationcharacteristics discussed above is shown in FIG. 7. FIG. 7 illustratesportions of the DAA system with like reference numbers and letters asshown in FIG. 4. As can be seen, FIG. 7 includes circuitry both internaland external to the phone side integrated circuit 1802B. Moreparticularly, FIG. 7 includes the RX, DCT, QB2, QE2, and FILT2 pins andassociated internal and external circuits (the hookswitch circuitry isnot being shown). As shown in FIG. 7, the DC holding circuit 700includes switches S1, S2, S3, S4, S5, S6, and S7. As discussed in detailbelow, the switches may be utilized to select the current limiting ornon-current limiting modes of operation, to switchable operate the DCholding circuit in order to achieve fast settling times and lowfrequency operation and to select the low voltage modes of operation.

[0046] The DC holding circuit 700 also includes a current limitingcircuit block 705, a distortion adjustment circuit block 710, and avoltage selection circuit block 715. As discussed further below, thecurrent limiting circuit block 705 operates in conjunction with properselection of switches to implement the higher effective impedance of theDC holding circuit to achieve the desired current limiting effect at aselected current limiting crossover point. The external transistor Q4 iscontrolled so that in the current limiting mode of operation current maybe steered to both resistors RB (which as described above may each beformed from multiple resistors) so that power may be dissipated externalto the integrated circuit 1802B. The distortion adjustment circuit block710 operates to lower the total harmonic distortion at the crossoverpoint. The voltage selection circuit block 715 is utilized to selecteither of the low voltage modes (modes 0 and 1) or the standard voltagemode (mode 2 or 3) The remaining portions of the DC holding circuit 700operate in both current limiting and non-current limiting modes as asecond order (two pole) system with external capacitors C12 and C5affecting the frequency of the poles. The components of the DC holdingcircuit may be configured in a wide variety of manners to obtain theadvantages of the invention disclosed herein and the embodiment of FIG.7 is merely exemplary. Likewise a wide variety of component values maybe utilized. In one embodiment, the component values may be selected asshown below in Table 2. The transistors may be sized as labeled “_X” inFIG. 7. TABLE 2 Internal Component Values Symbol Value R101, R102 98 kΩ,R103 60 kΩ, R104 30 kΩ, R105 50 kΩ, R108 10 kΩ, R109 2 MΩ, R110 2 kΩ,R111, R112 50 kΩ, R113 12.5 kΩ, R114 4.16 kΩ, R115 2.32 kΩ, I1 430 μA I260 μA

[0047] When the DC holding circuit 700 of FIG. 7 is operating in thenon-current limiting mode (modes 0, 1, or 2), switch S3 is open. Duringthe current limiting mode of operation (mode 3) switch S3 is closed. Aswill be described in more detail below, switches S1 S2, and S4 operateto selectably control time constants of the DC holding circuit 700 foruse with PTT specifications which may conflict with very low frequencyoperations. Switches S5 and S6 are utilized to select the low voltagemodes of operation (modes 0 and 1). More particularly, in standardvoltage level operation (modes 2 and 3) both switches S5 and S6 areclosed. In low voltage mode 0, switches S5 and S6 are both opened. Inlow voltage mode 1, switch S5 is open and switch S6 is closed. Inoperation, the selection of the state of the switches S5 and S6 willvary the resistance seen at the negative input of op amp OA2, thuschanging the DC voltage at the DCT pin, which in turn changes thevoltage between the TIP and RING lines for a given amount of DC loopcurrent. In mode 0 the DC voltage at the DCT pin is 2.8V, in mode 1 3.1Vand in modes 2 and 3 4.0V.

[0048] Current Limiting

[0049] As mentioned above, in the current limiting mode of operation(mode 3) switch S3 is closed and in the non-current limiting modes(modes 0-3) switch S3 is opened. The operation of the current limitingmode is discussed below with the time constant control switches set to aoperate in S1 open, S2 closed and S4 open (time constant phase 1) forillustrative purposes. However, the current limiting mode may also beoperated with the time constant phase 2 (S1 closed, S2 open and S4closed) selected.

[0050] During non-current limiting modes of operation (transistor Q4 isfully turned), the DC impedance of the DC holding circuit 700 of FIG. 7is approximately 50Ω when utilizing the illustrative component values ofTables 1 and 2. This impedance value is obtained as explained below. Theop amp circuitry of OA1 and OA2 attempt to force the DCT pin to trackthe AC signal on the TIP and RING lines with the resistor ratiosselected in the illustrative embodiment. The op amp circuitry alsoattempts to prevent the AC current component in the current throughtransistor M1 (and transistor M3 which is tied to the gate of transistorM1). The resulting DC current through transistor M1, I(M1), will thus beproportional to the DC line voltage sinceI(M1)=(V_(line)(DC)−V_(hookswitch)(DC)−V_(diode bridge)(DC)−V_(DCT)(DC))/RA,where V_(hookswitch)(DC) is the DC drop across the hookswitch circuitry,V_(diode bridge)(DC) is the DC drop across the diode bridge circuitryand V_(DCT) is the DC voltage at the DCT pin.

[0051] Further, the DC current at pin QE2 (and thus transistor Q4), willbe a function of the current mirror transistors M6 and M7. Moreparticularly with the 1X:63X sizing of the current mirror transistorsshown in FIG. 7, the DC current at pin QE2, I(QE2), will beapproximately 64×I(M3). Since I(M3)=I(M1)/2, I(QE2)=32×I(M1). Furthersince I(M1)=V_(line)/RA+k, I(QE2)=V_(line)/(RA/32)+k, wherein k is aconstant. Thus, with RA chosen to be 1600Ω the desired DC terminationimpedance of 50Ω will result in the non-current limiting mode ofoperation.

[0052] When the current limiting mode of operation is entered, theswitch S3 will be closed. This will allow current to sink throughresistor R108 and transistor M10. Thus, the gate voltage on transistorsM1 and M3 will not necessarily be the same. More particularly, whenswitch S3 is closed the current limiting effect will begin to occur as afunction of the value of the DC current source I1 since the currentlimiting circuit block 705 will attempt to maintain I1≧I(M2)+I(M4). Whenthe loop current is low, and thus the gate voltages on transistors M2and M4 is at a level such that I1>I(M2)+I(M4), current is not sunkthrough transistor M10 and the current limiting block 705 does not havean effect. At this point the circuit will be operating in the region ofsegment A of the mode 3 operation shown in FIG. 5D.

[0053] However, as the DC loop current increases, the current throughtransistors M2 and M4 will increase. When the total current I(M2)+I(M4)reaches the value of I1, the current limiting effect will begin byreducing I(M4) as I(M2) increases by sinking current through resistorR108 and transistor M10. In this manner the relationship I1=I(I2)+I(M4)may be maintained. This has the effect of reducing the current throughtransistor M3 and thus actively steering current out of the QE2 pin andinto resistors RA and RB. At this point the circuit will be operating inthe region of segment B of the mode 3 operation shown in FIG. 5D. Thelocation of the crossover point C (the point of change of DC impedance)of FIG. 5D is thus dependent upon the value of I1. In the illustrativeembodiment shown, I1 may be 430 μA to achieve a current limitingcrossover point at approximately 45 mA of DC loop current.

[0054] Distortion Limiting at Current Crossover

[0055] The current limiting technique discussed above has potential toincrease the harmonic distortion at the crossover (or “knee”) point ofthe DC I-V curve of FIG. 5D. More particularly, though ideally thecurrent through transistor M3 has no AC component, in practice non-idealcircuit components, mismatches, etc. will result in some AC component ofthe current through M3. Thus, the total phone line current, i_(LINE),will include the DC loop current of the holding circuit, the AC phonesignal, and AC component of the current in M3. Distortion in the ACcomponent of the current in M3 will therefore add harmonic distortion tothe phone line signal. The current limiting techniques discussed abovewill add distortion to the AC component of the M3 current when the DCloop current is located at the crossover point or close to it. Moreparticularly, in such situations the AC component of the transistor M3current will have result of repeatedly turning on and off the currentlimiting effect. This will result in the AC component of the current intransistor M3 to also be repeatedly limited or not limited, thusdistorting the AC component. For example, when the DC loop current islocated at the crossover point and a low frequency sine wave is appliedon the phone line, the AC component of the current through transistor M3may be clipped as shown by curve A of FIG. 8. As shown in FIG. 8, theclipping of curve A will occur when the total current through M3 exceedsthe value of the current limit level, H1. This distortion will be mostsignificant for relatively low frequency signals (about less than 100Hz) due to the low pass filtering effect of capacitor C5 on the outputof OA2 which tends to remove higher frequency components (note that C5provides a high pass filter to node RX which in turn performs a low passfiltering effect on the gate of transistor M1 through the use of OA1 andOA2).

[0056] The distortion adjustment circuit block 710 of FIG. 14compensates for this clipping effect through control of transistor M14which is also coupled to the QE2 pin. The distortion adjustment circuitblock 710 operates in the mode 3 current limiting mode through theclosure of switch S7. In other modes, switch S7 is opened and thedistortion adjustment circuit block 710 does not affect the DC holdingcircuitry. The distortion adjustment circuit block 710 operates suchthat the current through transistor M14 has a response opposite to thatof the current through transistor M3 such as shown by curve B of FIG. 8.Because both transistors M3 and M14 are coupled to the QE2 pin, thetotal AC component effect of the current through transistors M3 and M14will sum together. Since curves A and B FIG. 8 demonstrate oppositeclipping effects, the summation of these currents will be relativelyfree of clipping and the associated distortion, at least to a firstorder. The current response of curve B is obtained through the currentsteering relationship of transistors M3, M12, M11 and M14. Thus, withthe transistor sizing shown in FIG. 7, the relationshipi(M14)=(10×I2)−i(M3) will result and the resulting AC component seen bythe phone line due to the AC component of the current in transistors M3and M4 will be 10×I2. The value of I2 may be chosen such that I2 isgreater than I(M3)/10 at the crossover point.

[0057] 2^(nd) Order DC Holding Circuit

[0058] The DC holding circuit 700 of FIG. 7 is further advantageous inthat it is a second order DC holding circuit. More particularly, a firstand second pole in the frequency response of the circuit is providedthrough the use of capacitors C5 and C12 respectively. The first poleresults from the filtering action at the RX pin resulting from capacitorC5 and the associated resistors coupled to the RX pin. This filteringaction is relatively sufficient at high frequencies (for example 100 Hzor greater) to result in very little AC signals on the common gate lineof transistors M1 and M3 (and thus low AC current components throughthose transistors). However, at low frequencies more AC currentcomponents will be present in transistors M1 and M3 which would resultin distortion at low frequencies. Improved frequency response may beobtained by adding a second frequency pole to the system. For example,another stage of low pass filtering could be added between the gates oftransistor Ml and M3 to more heavily filter the gate signal ontransistor M3. Alternatively, as shown in FIG. 7 the additional low passfiltering may be provided through the use capacitor C12 coupled to theQE2 pin. The use of the filter capacitor C12 coupled to the QE2 pin alsoprovides noise filtering of the large PMOS device M7 which is used as alarge current sinking device.

[0059] Thus, a second order DC holding circuit is provided. The use of asecond order frequency response circuit provides a DC holding circuitwhich may have greater than 60 dB THD at 100 Hz, 20 mA, −1 dBm. Thesecond order DC holding circuit is shown in one implementation to havetwo filter capacitors (C5 and C12) placed external to the phone sideintegrated circuit 1802B, however, other circuit techniques may beutilized to achieve a second order DC holding circuit. It is desirablethat the frequency poles by low frequency poles, such as at or below 300Hz, and more particularly below 50 Hz. In the illustrativeimplementation, the first filter resulting from capacitor C5 provides afirst pole at 16 Hz (a low pass filter effect on the gate of transistorM1). The second filter resulting from capacitor C12 provides a secondpole at 0.44 Hz.

[0060] Switchable Time Constants

[0061] It is generally desirable that the DC holding circuit present aimpedance at DC and at AC frequencies the DC circuitry is removed fromthe signal path. One way to achieve such performance would be to providea DC circuit which operates very slowly such that it is cut off atfrequencies above several hertz. This may be particularly important whentransmitting very low frequency modem signals (down to approximately 10hertz) which have low distortion requirements such as greater than 75 dBTHD for frequencies greater than 300 Hz (full scale), 60 dB THD forfrequencies greater than 100 Hz (full scale), and), and 80 dB THD forfrequencies greater than 100 Hz (at −9 dBm) However, the use of veryslow DC holding circuitry would conflict with phone line interfacestandards in many PTT specifications. For example, some interfacestandards which require rapid on-hook and off-hook switching. Forexample, the settling time for switching between on-hook and off-hookconditions may be required to be greater than 90% loop current settlingin 20 msec from an off hook event. Such time constraints may beparticularly important for pulse dialing.

[0062] The present invention may include the use of switchable timeconstants which affect the speed of the DC holding circuitry. Thus, theDC holding circuitry may be operated in a first phase (phase 1) whichhas a fast settling time and in a second phase (phase 2) which has slowsettling time to allow low frequency operation. Thus, the DC holdingcircuit may be utilized to meet the standards for rapid on/off-hookoperation (such as in pulse dialing) and then after the phone line goesoff-hook the DC holding circuit may be switched to slower circuitoperation to allow low frequency phone line signal operation. In thismanner a DC holding circuit having a variable operating frequency isprovided.

[0063] The phase of operation, high speed phase 1 or low speed phase 2,is controlled by switches S1, S2, and S4. During high speed phase 1,switch S1 is closed, S2 opened and S4 closed. Closing switch S1 andopening switch S2 results in removing the first frequency pole (causedby capacitor C5) from the DC holding circuit. Further, closing switch 4increasing the second frequency pole to 360 Hz since the time constantof the loop current settling is now set by capacitor C12 and resistor110 in parallel with resistor R109. The value of the capacitor andresistors may be selected (as shown above) to provide proper settlingwithin a few milliseconds to give fast pulse dialing settling. It isnoted that during phase 1, capacitors C5 and C12 will charge to theirappropriate values. This charging will help minimize transient glitcheswhen switching from phase 1 to phase 2. When the DC holding circuit isswitched to phase 2, the standard second order DC holding circuitoperation described above results. Phase 2 may be set to activate atapproximately 200 msec after off-hook conditions occur. The switchingbetween phase 1 and phase 2 conditions may be utilized with all of themodes of operation (modes 0-3) described above.

[0064] Thus, a DAA DC holding circuit operable in two phases isprovided. The first phase may be a fast mode of operation used duringthe transmission of signaling information such as establishment ofoff-hook conditions or pulse dialing. The second phase may be a slowmode of operation used for the transmission of phone user data (such as,for example, voice data or modem data). The DC holding circuit may be inthe first phase until some time period after off-hook conditions arelast detected (for example 200 msec). Thereafter the DC holding circuitmay be switched to the second phase. The time constant of the circuitfor establishing off-hook conditions (the first phase) may be relativelyfast or short, typically less than 10 msec, more preferably less than 5msec and in the illustrative embodiment less than 1 msec. The timeconstant of the circuit during user data transmission (the second phase)may be relatively slow or long, typically greater than 100 msec, morepreferably greater than 200 msec and in the illustrative embodimentapproximately 400 msec.

[0065] Further modifications and alternative embodiments of thisinvention will be apparent to those skilled in the art in view of thisdescription. Accordingly, this description is to be construed asillustrative only and is for the purpose of teaching those skilled inthe art the manner of carrying out the invention. It is to be understoodthat the forms of the invention herein shown and described are to betaken as the presently preferred embodiments. Various changes may bemade in the shape, size and arrangement of parts. For example,equivalent elements may be substituted for those illustrated anddescribed herein, and certain features of the invention may be utilizedindependently of the use of other features, all as would be apparent toone skilled in the art after having the benefit of this description ofthe invention. Moreover, the various aspects of the inventions disclosedherein may be used in combination or separately as will also be apparentto those skilled in the art. For example, though the current steering isshown herein with regard to a programmable DAA, the use of externaldevices to dissipate substantial amounts of power for DC current limitedstandards may be utilized in a non-programmable DAA.

1-43. (Canceled)
 44. A communication system, comprising: phone line sidecircuitry that may be coupled to phone lines; powered side circuitrythat may be coupled to the phone line side circuitry through anisolation barrier comprised of a plurality of isolation elements; and aDC holding circuit within the phone line side circuitry, the DC holdingcircuit being switchable to operate in a plurality of DC holding circuitphases, the DC holding circuit having a first time constant in at leasta first DC holding circuit phase and having a second time constant in atleast a second DC holding circuit phase; wherein the powered sidecircuitry is configured to communicate a first digital differentialsignal to at least two of the plurality of isolation elements, the atleast two isolation elements comprising at least a first isolationcapacitor and a second isolation capacitor; wherein the phone line sidecircuitry is configured to communicate a second digital differentialsignal to the first isolation capacitor and the second isolationcapacitor so that the first and second digital differential signals arecommunicated across the same first and second isolation capacitors andso that the first and second isolation capacitors bidirectionallytransfer the first and second digital differential signals; wherein thepowered side circuitry is further configured to provide a clock signalto the phone line side circuitry through at least one of the pluralityof isolation elements; and wherein the powered side circuitry and thephone line side circuitry are configured so that power is capable ofbeing provided from the powered side circuitry to the phone line sidecircuitry while still maintaining the isolation required by the phoneline isolation regulatory standards.
 45. The communication system ofclaim 44, further comprising the isolation barrier coupled between thephone line side circuitry and the powered side circuitry.
 46. Thecommunication system of claim 44, the first DC holding circuit phaseoccurring before the second DC holding circuit phase, wherein the firsttime constant is shorter than the second time constant.
 47. Thecommunication system of claim 44, the DC holding circuit operable in thefirst DC holding circuit phase to allow for a first settling time forestablishing off-hook conditions and the second DC holding circuit phaseto allow for a second settling time after the first phase, the secondsettling time being slower than the first.
 48. The communication systemof claim 47, the first time constant being less than 10 msec and thesecond time constant being greater than 100 msec.
 49. The communicationsystem of claim 44, the first time constant being at least an order ofmagnitude shorter than the second time constant.
 50. The communicationsystem of claim 44, wherein the powered side circuitry is furtherconfigured to provide the clock signal to the phone line side circuitrythrough an isolation element that is separate from the first isolationcapacitor and the second isolation capacitor.
 51. The communicationsystem of claim 44, wherein at least one of the first digitaldifferential signal and the second digital differential signal includesboth data information and control information.
 52. The communicationsystem of claim 44, wherein each of said plurality of isolation elementsof said isolation barrier comprises a capacitor.
 53. The communicationsystem of claim 44, wherein at least a portion of said plurality ofisolation elements of said isolation barrier each comprises a capacitor.54. A communication system, comprising: phone line side circuitry thatmay be coupled to phone lines; powered side circuitry that may becoupled to the phone line side circuitry through an isolation barriercomprised of a plurality of isolation elements; and a DC holding circuitwithin the phone line side circuitry, the DC holding circuit beingswitchable to operate in a plurality of DC holding circuit phases, theDC holding circuit having a first time constant in at least a first DCholding circuit phase and having a second time constant in at least asecond DC holding circuit phase; wherein said powered side circuitry isconfigured to communicate a first digital differential signal to atleast two of the plurality of isolation elements, the at least twoisolation elements comprising at least a first isolation capacitor and asecond isolation capacitor; wherein said phone line side circuitry isconfigured to communicate a second digital differential signal to thefirst isolation capacitor and the second isolation capacitor so that thefirst and second digital differential signals are communicated acrossthe same first and second isolation capacitors and so that the first andsecond isolation capacitors bidirectionally transfer the first andsecond digital differential signals; wherein the powered side circuitryis further configured to provide a clock signal to the phone line sidecircuitry through at least one of the plurality of isolation elementsthat is separate from the first isolation capacitor and the secondisolation capacitor; wherein the powered side circuitry and the phoneline side circuitry are configured so that power is capable of beingprovided from the powered side circuitry to the phone line sidecircuitry while still maintaining the isolation required by the phoneline isolation regulatory standards; and wherein at least one of thefirst digital differential signal and the second digital differentialsignal includes both data information and control information.
 55. Thecommunication system of claim 54, further comprising the isolationbarrier coupled between the phone line side circuitry and the poweredside circuitry.
 56. The communication system of claim 54, the first DCholding circuit phase occurring before the second DC holding circuitphase, wherein the first time constant is shorter than the second timeconstant.
 57. The communication system of claim 54, the DC holdingcircuit operable in the first DC holding circuit phase to allow for afirst settling time for establishing off-hook conditions and the secondDC holding circuit phase to allow for a second settling time after thefirst phase, the second settling time being slower than the first. 58.The communication system of claim 57, the first time constant being lessthan 10 msec and the second time constant being greater than 100 msec.59. The communication system of claim 54, the first time constant beingat least an order of magnitude shorter than the second time constant.60. The communication system of claim 54, wherein each of said pluralityof isolation elements of said isolation barrier comprises a capacitor.61. The communication system of claim 54, wherein at least a portion ofsaid plurality of isolation elements of said isolation barrier eachcomprises a capacitor.
 62. A method of providing a communication systemthat may be coupled to a phone line, comprising: coupling an isolationbarrier between powered side circuitry and phone line side circuitry,the isolation barrier comprising a plurality of isolation elements;configuring the powered side circuitry to communicate a first digitaldifferential signal to at least two of the isolation barrier elements,the at least two isolation barrier elements comprising at least a firstisolation capacitor and a second isolation capacitor; configuring thephone line side circuitry to communicate a second digital differentialsignal to the first isolation capacitor and the second isolationcapacitor so that the first and second digital differential signals arecommunicated across the same first and second isolation capacitors andso that the first and second isolation capacitors bidirectionallytransfer the first and second digital differential signals; configuringthe powered side circuitry to provide a clock signal to the phone lineside circuitry through at least one of the plurality of isolationelements; configuring the powered side circuitry and the phone line sidecircuitry so that power is capable of being provided from the phone lineside circuitry to the phone line side circuitry while still maintainingthe isolation required by the phone line isolation regulatory standards;operating a DC holding circuit in first and second off-hook phases;utilizing a first DC holding circuit time constant during the firstphase; and utilizing a second DC holding circuit time constant duringthe second phase, wherein the first time constant provides fastersettling of the DC holding circuit than the second time constant. 63.The method of claim 62, further comprising operating the DC holdingcircuit operable in the first phase to allow for a first settling timefor establishing off-hook conditions and the second phase having toallow for a second settling time after the first phase.
 64. The methodof claim 62, further comprising operating the DC holding circuitoperable in the first phase to allow for a first settling time forestablishing off-hook conditions and the second phase having to allowfor a second settling time after the first phase.
 65. The method ofclaim 62, the first time constant being at least an order of magnitudeshorter than the second time constant.
 66. The method of claim 62,wherein the clock signal is provided from the powered side circuitry tothe phone line side circuitry through an isolation element that isseparate from the first isolation capacitor and the second isolationcapacitor.
 67. The method of claim 62, wherein at least one of the firstdigital differential signal and the second digital differential signalincludes both data information and control information.
 68. The methodof claim 62, wherein each of said plurality of isolation elements ofsaid isolation barrier comprises a capacitor.
 69. The method of claim61, wherein at least a portion of said plurality of isolation elementsof said isolation barrier each comprises a capacitor.
 70. A method ofproviding a communication system that may be coupled to a phone line,comprising: coupling an isolation barrier between powered side circuitryand phone line side circuitry, the isolation barrier comprising aplurality of isolation elements; configuring the powered side circuitryto communicate a first digital differential signal to at least two ofthe isolation barrier elements, the at least two isolation barrierelements comprising at least a first isolation capacitor and a secondisolation capacitor; configuring the phone line side circuitry tocommunicate a second digital differential signal to the first isolationcapacitor and the second isolation capacitor so that the first andsecond digital differential signals are communicated across the samefirst and second isolation capacitors and so that the first and secondisolation capacitors bidirectionally transfer the first and seconddigital differential signals, wherein at least one of the first digitaldifferential signal and the second digital differential signal includesboth data and control information; configuring the powered sidecircuitry to provide a clock signal to the phone line side circuitrythrough at least one of the plurality of isolation elements, wherein theclock signal is provided from the powered side circuitry to the phoneline side circuitry through an isolation element that is separate fromthe first isolation capacitor and the second isolation capacitor;configuring the powered side circuitry and the phone line side circuitryso that power is capable of being provided from the phone line sidecircuitry to the phone line side circuitry while still maintaining theisolation required by the phone line isolation regulatory standards;operating a DC holding circuit in first and second off-hook phases;utilizing a first DC holding circuit time constant during the firstphase; and utilizing a second DC holding circuit time constant duringthe second phase, wherein the first time constant provides fastersettling of the DC holding circuit than the second time constant. 71.The method of claim 70, further comprising operating the DC holdingcircuit operable in the first phase to allow for a first settling timefor establishing off-hook conditions and the second phase having toallow for a second settling time after the first phase.
 72. The methodof claim 70, further comprising operating the DC holding circuitoperable in the first phase to allow for a first settling time forestablishing off-hook conditions and the second phase having to allowfor a second settling time after the first phase.
 73. The method ofclaim 70, the first time constant being at least an order of magnitudeshorter than the second time constant.
 74. The method of claim 70,wherein each of said plurality of isolation elements of said isolationbarrier comprises a capacitor.
 75. The method of claim 70, wherein atleast a portion of said plurality of isolation elements of saidisolation barrier each comprises a capacitor.
 76. A communicationsystem, comprising: phone line side circuitry capable of being coupledto phone lines; powered side circuitry capable of being coupled to thephone line side circuitry through an isolation barrier comprised of aplurality of isolation elements; a DC holding circuit within the phoneline side circuitry, the DC holding circuit comprising: at least a firstcircuit within the DC holding circuit, the first circuit affecting thesettling time of the DC holding circuit, at least one switchablecircuit, the switchable circuit having a first state for a first phaseof operation of the DC holding circuit and a second state for a secondphase of operation of the DC holding circuit, the at least oneswitchable circuit coupled to the first circuit, and at least oneswitched element selectively connectable to the first circuit by theswitchable circuit, a time constant of the DC holding circuit changingdepending upon the state of the at least one switchable circuit; whereinthe powered side circuitry is configured to communicate a first digitaldifferential signal to at least two of the plurality of isolationelements, the at least two isolation elements comprising at least afirst isolation capacitor and a second isolation capacitor; wherein thephone line side circuitry is configured to communicate a second digitaldifferential signal to the first isolation capacitor and the secondisolation capacitor so that the first and second digital differentialsignals are communicated across the same first and second isolationcapacitors and so that the first and second isolation capacitorsbidirectionally transfer the first and second digital differentialsignals; wherein the powered side circuitry is further configured toprovide a clock signal to the phone line side circuitry through at leastone of the plurality of isolation elements; and wherein the powered sidecircuitry and the phone line side circuitry are configured so that poweris capable of being provided from the powered side circuitry to thephone line side circuitry while still maintaining the isolation requiredby the phone line isolation regulatory standards.
 77. The communicationsystem of claim 76, the DC holding circuit having a first time constantwhen the switchable circuit is configured for the first state and havinga second time constant when the switchable circuit is configured for thesecond state, the first time constant being shorter than the second timeconstant.
 78. The communication system of claim 76, the DC holdingcircuit operable in the first phase to allow for a first settling timefor establishing off-hook conditions and the second phase having toallow for a second settling time after the first phase, the secondsettling time being slower than the first.
 79. The communication systemof claim 77, the first time constant being at least an order ofmagnitude shorter than the second time constant.
 80. The communicationsystem of claim 79, the first time constant being less than about 10msec and the second time constant being greater than about 100 msec. 81.The communication system of claim 77, the first time constant being atleast an order of magnitude shorter than the second time constant. 82.The communication system of claim 76, wherein the powered side circuitryis further configured to provide the clock signal to the phone line sidecircuitry through an isolation element that is separate from the firstisolation capacitor and the second isolation capacitor.
 83. Thecommunication system of claim 76, wherein at least one of the firstdigital differential signal and the second digital differential signalincludes both data information and control information.
 84. Thecommunication system of claim 76, wherein each of said plurality ofisolation elements of said isolation barrier comprises a capacitor. 85.The communication system of claim 76, wherein at least a portion of saidplurality of isolation elements of said isolation barrier each comprisesa capacitor.
 86. A communication system, comprising: phone line sidecircuitry capable of being coupled to phone lines; powered sidecircuitry capable of being coupled to the phone line side circuitrythrough an isolation barrier comprised of a plurality of isolationelements; a DC holding circuit within the phone line side circuitry, theDC holding circuit comprising: at least a first circuit within the DCholding circuit, the first circuit affecting the settling time of the DCholding circuit, at least one switchable circuit, the switchable circuithaving a first state for a first phase of operation of the DC holdingcircuit and a second state for a second phase of operation of the DCholding circuit, the at least one switchable circuit coupled to thefirst circuit, and at least one switched element selectively connectableto the first circuit by the switchable circuit, a time constant of theDC holding circuit changing depending upon the state of the at least oneswitchable circuit; wherein the powered side circuitry is configured tocommunicate a first digital differential signal to at least two of theplurality of isolation elements, the at least two isolation elementscomprising at least a first isolation capacitor and a second isolationcapacitor; wherein the phone line side circuitry is configured tocommunicate a second digital differential signal to the first isolationcapacitor and the second isolation capacitor so that the first andsecond digital differential signals are communicated across the samefirst and second isolation capacitors and so that the first and secondisolation capacitors bidirectionally transfer the first and seconddigital differential signals; wherein the powered side circuitry isfurther configured to provide a clock signal to the phone line sidecircuitry through at least one of the plurality of isolation elementsthat is separate from the first isolation capacitor and the secondisolation capacitor; wherein the powered side circuitry and the phoneline side circuitry are configured so that power is capable of beingprovided from the powered side circuitry to the phone line sidecircuitry while still maintaining the isolation required by the phoneline isolation regulatory standards; and wherein at least one of thefirst digital differential signal and the second digital differentialsignal includes both data information and control information.
 87. Thecommunication system of claim 86, the DC holding circuit having a firsttime constant when the switchable circuit is configured for the firststate and having a second time constant when the switchable circuit isconfigured for the second state, the first time constant being shorterthan the second time constant.
 88. The communication system of claim 86,the DC holding circuit operable in the first phase to allow for a firstsettling time for establishing off-hook conditions and the second phasehaving to allow for a second settling time after the first phase, thesecond settling time being slower than the first.
 89. The communicationsystem of claim 87, the first time constant being at least an order ofmagnitude shorter than the second time constant.
 90. The communicationsystem of claim 89, the first time constant being less than about 10msec and the second time constant being greater than about 100 msec. 91.The communication system of claim 87, the first time constant being atleast an order of magnitude shorter than the second time constant. 92.The communication system of claim 86, wherein each of said plurality ofisolation elements of said isolation barrier comprises a capacitor. 93.The communication system of claim 86, wherein at least a portion of saidplurality of isolation elements of said isolation barrier each comprisesa capacitor.
 94. A method of providing a communication system capable ofbeing coupled to a phone line, comprising: coupling an isolation barrierbetween powered side circuitry and phone line side circuitry, theisolation barrier comprising a plurality of isolation elements;configuring the powered side circuitry to communicate a first digitaldifferential signal to at least two of the isolation barrier elements,the at least two isolation barrier elements comprising at least a firstisolation capacitor and a second isolation capacitor; configuring thephone line side circuitry to communicate a second digital differentialsignal to the first isolation capacitor and the second isolationcapacitor so that the first and second digital differential signals arecommunicated across the same first and second isolation capacitors andso that the first and second isolation capacitors bidirectionallytransfer the first and second digital differential signals; configuringthe powered side circuitry to provide a clock signal to the phone lineside circuitry through at least one of the plurality of isolationelements; configuring the powered side circuitry and the phone line sidecircuitry so that power is capable of being provided from the phone lineside circuitry to the phone line side circuitry while still maintainingthe isolation required by the phone line isolation regulatory standards;forming a DC holding circuit within the phone line side circuitry, theDC holding circuit being formed with internal circuitry internal to anintegrated circuit and external circuitry external to the integratedcircuit; providing a programmable circuit for switching the DC holdingcircuit between at least a first and second phase of operation; andconfiguring the DC holding circuit to allow for the DC holding circuitto operate faster during the first phase and slower during the secondphase.
 95. The method of claim 94, further comprising configuring the DCholding circuit to be operable in the first phase to allow for a firstsettling time for establishing off-hook conditions and in the secondphase to allow for a second settling time after the first phase.
 96. Themethod of claim 95, the first time constant being at least an order ofmagnitude shorter than the second time constant.
 97. The method of claim94, wherein the clock signal is provided from the powered side circuitryto the phone line side circuitry through an isolation element that isseparate from the first isolation capacitor and the second isolationcapacitor.
 98. The method of claim 94, wherein at least one of the firstdigital differential signal and the second digital differential signalincludes both data information and control information.
 99. The methodof claim 94, wherein each of said plurality of isolation elements ofsaid isolation barrier comprises a capacitor.
 100. The method of claim94, wherein at least a portion of said plurality of isolation elementsof said isolation barrier each comprises a capacitor.
 101. A method ofproviding a communication system capable of being coupled to a phoneline, comprising: coupling an isolation barrier between powered sidecircuitry and phone line side circuitry, the isolation barriercomprising a plurality of isolation elements; configuring the poweredside circuitry to communicate a first digital differential signal to atleast two of the isolation barrier elements, the at least two isolationbarrier elements comprising at least a first isolation capacitor and asecond isolation capacitor; configuring the phone line side circuitry tocommunicate a second digital differential signal to the first isolationcapacitor and the second isolation capacitor so that the first andsecond digital differential signals are communicated across the samefirst and second isolation capacitors and so that the first and secondisolation capacitors bidirectionally transfer the first and seconddigital differential signals, wherein at least one of the first digitaldifferential signal and the second digital differential signal includesboth data and control information; configuring the powered sidecircuitry to provide a clock signal to the phone line side circuitrythrough at least one of the plurality of isolation elements, wherein theclock signal is provided from the powered side circuitry to the phoneline side circuitry through an isolation element that is separate fromthe first isolation capacitor and the second isolation capacitor;configuring the powered side circuitry and the phone line side circuitryso that power is capable of being provided from the phone line sidecircuitry to the phone line side circuitry while still maintaining theisolation required by the phone line isolation regulatory standards;forming a DC holding circuit within the phone line side circuitry, theDC holding circuit being formed with internal circuitry internal to anintegrated circuit and external circuitry external to the integratedcircuit; providing a programmable circuit for switching the DC holdingcircuit between at least a first and second phase of operation; andconfiguring the DC holding circuit to allow for the DC holding circuitto operate faster during the first phase and slower during the secondphase.
 102. The method of claim 101, further comprising configuring theDC holding circuit to be operable in the first phase to allow for afirst settling time for establishing off-hook conditions and in thesecond phase to allow for a second settling time after the first phase.103. The method of claim 102, the first time constant being at least anorder of magnitude shorter than the second time constant.
 104. Themethod of claim 101, wherein each of said plurality of isolationelements of said isolation barrier comprises a capacitor.
 105. Themethod of claim 101, wherein at least a portion of said plurality ofisolation elements of said isolation barrier each comprises a capacitor.106. A method of operating a DAA circuit, comprising: providing phoneline side circuitry capable of being coupled to phone lines; providingpowered side circuitry capable of being coupled to the phone line sidecircuitry through an isolation barrier comprised of a plurality ofisolation elements; providing a DC holding circuit within the phone lineside circuitry; utilizing a first time constant of the DC holdingcircuit during a first phase of operation of the DC holding circuit; andutilizing a second time constant of the DC holding circuit during asecond phase of operation of the DC holding circuit, settling times ofthe DC holding circuit being faster during the first phase than duringthe second; wherein the powered side circuitry is configured tocommunicate a first digital differential signal to at least two of theplurality of isolation elements, the at least two isolation elementscomprising at least a first isolation capacitor and a second isolationcapacitor; wherein the phone line side circuitry is configured tocommunicate a second digital differential signal to the first isolationcapacitor and the second isolation capacitor so that the first andsecond digital differential signals are communicated across the samefirst and second isolation capacitors and so that the first and secondisolation capacitors bidirectionally transfer the first and seconddigital differential signals; wherein the powered side circuitry isfurther configured to provide a clock signal to the phone line sidecircuitry through at least one of the plurality of isolation elements;and wherein the powered side circuitry and the phone line side circuitryare configured so that power is capable of being provided from thepowered side circuitry to the phone line side circuitry while stillmaintaining the isolation required by the phone line isolationregulatory standards.
 107. The method of claim 106, further comprisingconfiguring the DC holding circuit to be operable in the first phase toallow for a first settling time for establishing off-hook conditions andin the second phase to allow for a second settling time after the firstphase.
 108. The method of claim 107, the first time constant being atleast an order of magnitude shorter than the second time constant. 109.The method of claim 106, the first time constant being at least an orderof magnitude shorter than the second time constant.
 110. The method ofclaim 106, wherein the powered side circuitry is further configured toprovide the clock signal to the phone line side circuitry through anisolation element that is separate from the first isolation capacitorand the second isolation capacitor.
 111. The method of claim 106,wherein at least one of the first digital differential signal and thesecond digital differential signal includes both data information andcontrol information.
 112. The method of claim 106, wherein each of saidplurality of isolation elements of said isolation barrier comprises acapacitor.
 113. The method of claim 106, wherein at least a portion ofsaid plurality of isolation elements of said isolation barrier eachcomprises a capacitor.
 114. A method of operating a DAA circuit,comprising: providing phone line side circuitry capable of being coupledto phone lines; providing powered side circuitry capable of beingcoupled to the phone line side circuitry through an isolation barriercomprised of a plurality of isolation elements; providing a DC holdingcircuit within the phone line side circuitry; utilizing a first timeconstant of the DC holding circuit during a first phase of operation ofthe DC holding circuit; and utilizing a second time constant of the DCholding circuit during a second phase of operation of the DC holdingcircuit, settling times of the DC holding circuit being faster duringthe first phase than during the second; wherein the powered sidecircuitry is configured to communicate a first digital differentialsignal to at least two of the plurality of isolation elements, the atleast two isolation elements comprising at least a first isolationcapacitor and a second isolation capacitor; wherein the phone line sidecircuitry is configured to communicate a second digital differentialsignal to the first isolation capacitor and the second isolationcapacitor so that the first and second digital differential signals arecommunicated across the same first and second isolation capacitors andso that the first and second isolation capacitors bidirectionallytransfer the first and second digital differential signals; wherein thepowered side circuitry is further configured to provide a clock signalto the phone line side circuitry through at least one of the pluralityof isolation elements that is separate from the first isolationcapacitor and the second isolation capacitor; wherein the powered sidecircuitry and the phone line side circuitry are configured so that poweris capable of being provided from the powered side circuitry to thephone line side circuitry while still maintaining the isolation requiredby the phone line isolation regulatory standards; and wherein at leastone of the first digital differential signal and the second digitaldifferential signal includes both data information and controlinformation.
 115. The method of claim 114, further comprisingconfiguring the DC holding circuit to be operable in the first phase toallow for a first settling time for establishing off-hook conditions andin the second phase to allow for a second settling time after the firstphase.
 116. The method of claim 115, the first time constant being atleast an order of magnitude shorter than the second time constant. 117.The method of claim 114, the first time constant being at least an orderof magnitude shorter than the second time constant.
 118. The method ofclaim 114, wherein each of said plurality of isolation elements of saidisolation barrier comprises a capacitor.
 119. The method of claim 114,wherein at least a portion of said plurality of isolation elements ofsaid isolation barrier each comprises a capacitor.